CRC_CTRL_INIT=CRC_CTRL_INIT_SEED, CRC_CTRL_ENDIAN=CRC_CTRL_ENDIAN_SBHW, CRC_CTRL_TYPE=CRC_CTRL_TYPE_P8055
CRC Control
| CRC_CTRL_TYPE | Operation Type 0 (CRC_CTRL_TYPE_P8055): Polynomial 0x8005 1 (CRC_CTRL_TYPE_P1021): Polynomial 0x1021 2 (CRC_CTRL_TYPE_P4C11DB7): Polynomial 0x4C11DB7 3 (CRC_CTRL_TYPE_P1EDC6F41): Polynomial 0x1EDC6F41 8 (CRC_CTRL_TYPE_TCPCHKSUM): TCP checksum |
| CRC_CTRL_ENDIAN | Endian Control 0 (CRC_CTRL_ENDIAN_SBHW): Configuration unchanged. (B3, B2, B1, B0) 1 (CRC_CTRL_ENDIAN_SHW): Bytes are swapped in half-words but half-words are not swapped (B2, B3, B0, B1) 2 (CRC_CTRL_ENDIAN_SHWNB): Half-words are swapped but bytes are not swapped in half-word. (B1, B0, B3, B2) 3 (CRC_CTRL_ENDIAN_SBSW): Bytes are swapped in half-words and half-words are swapped. (B0, B1, B2, B3) |
| CRC_CTRL_BR | Bit reverse enable |
| CRC_CTRL_OBR | Output Reverse Enable |
| CRC_CTRL_RESINV | Result Inverse Enable |
| CRC_CTRL_SIZE | Input Data Size |
| CRC_CTRL_INIT | CRC Initialization 0 (CRC_CTRL_INIT_SEED): Use the CRCSEED register context as the starting value 2 (CRC_CTRL_INIT_0): Initialize to all ‘0s’ 3 (CRC_CTRL_INIT_1): Initialize to all ‘1s’ |